Freescale Semiconductor /MK60DZ10 /CAN1 /MCR

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as MCR

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0MAXMB0 (00)IDAM 0 (0)AEN 0 (0)LPRIOEN 0 (0)IRMQ 0 (0)SRXDIS 0 (0)DOZE 0 (0)LPMACK 0 (0)WRNEN 0 (0)SLFWAK 0 (0)SUPV 0 (0)FRZACK 0 (0)SOFTRST 0 (0)WAKMSK 0 (0)NOTRDY 0 (0)HALT 0 (0)RFEN 0 (0)FRZ 0 (0)MDIS

SLFWAK=0, MDIS=0, AEN=0, SRXDIS=0, RFEN=0, LPRIOEN=0, LPMACK=0, SOFTRST=0, HALT=0, IRMQ=0, WRNEN=0, FRZACK=0, WAKMSK=0, SUPV=0, NOTRDY=0, DOZE=0, FRZ=0, IDAM=00

Description

Module Configuration Register

Fields

MAXMB

Number of the Last Message Buffer

IDAM

ID Acceptance Mode

0 (00): Format A: One full ID (standard and extended) per ID Filter Table element.

1 (01): Format B: Two full standard IDs or two partial 14-bit (standard and extended) IDs per ID Filter Table element.

2 (10): Format C: Four partial 8-bit Standard IDs per ID Filter Table element.

3 (11): Format D: All frames rejected.

AEN

Abort Enable

0 (0): Abort disabled

1 (1): Abort enabled

LPRIOEN

Local Priority Enable

0 (0): Local Priority disabled

1 (1): Local Priority enabled

IRMQ

Individual Rx Masking and Queue Enable

0 (0): Individual Rx masking and queue feature are disabled. For backward compatibility, the reading of C/S word locks the MB even if it is EMPTY.

1 (1): Individual Rx masking and queue feature are enabled.

SRXDIS

Self Reception Disable

0 (0): Self reception enabled

1 (1): Self reception disabled

DOZE

Doze Mode Enable

0 (0): FlexCAN is not enabled to enter low power mode when Doze Mode is requested.

1 (1): FlexCAN is enabled to enter low power mode when Doze Mode is requested.

LPMACK

Low Power Mode Acknowledge

0 (0): FlexCAN is not in a low power mode.

1 (1): FlexCAN is in a low power mode.

WRNEN

Warning Interrupt Enable

0 (0): TWRNINT and RWRNINT bits are zero, independent of the values in the error counters.

1 (1): TWRNINT and RWRNINT bits are set when the respective error counter transitions from less than 96 to greater than or equal to 96.

SLFWAK

Self Wake Up

0 (0): FlexCAN Self Wake Up feature is disabled.

1 (1): FlexCAN Self Wake Up feature is enabled.

SUPV

Supervisor Mode

0 (0): FlexCAN is in User Mode. Affected registers allow both Supervisor and Unrestricted accesses.

1 (1): FlexCAN is in Supervisor Mode. Affected registers allow only Supervisor access. Unrestricted access behaves as though the access was done to an unimplemented register location.

FRZACK

Freeze Mode Acknowledge

0 (0): FlexCAN not in Freeze Mode, prescaler running

1 (1): FlexCAN in Freeze Mode, prescaler stopped

SOFTRST

Soft Reset

0 (0): No reset request

1 (1): Resets the registers affected by soft reset.

WAKMSK

Wake Up Interrupt Mask

0 (0): Wake Up Interrupt is disabled.

1 (1): Wake Up Interrupt is enabled.

NOTRDY

FlexCAN Not Ready

0 (0): FlexCAN module is either in Normal Mode, Listen-Only Mode or Loop-Back Mode.

1 (1): FlexCAN module is either in Disable Mode, Doze Mode , Stop Mode or Freeze Mode.

HALT

Halt FlexCAN

0 (0): No Freeze Mode request.

1 (1): Enters Freeze Mode if the FRZ bit is asserted.

RFEN

Rx FIFO Enable

0 (0): Rx FIFO not enabled

1 (1): Rx FIFO enabled

FRZ

Freeze Enable

0 (0): Not enabled to enter Freeze Mode

1 (1): Enabled to enter Freeze Mode

MDIS

Module Disable

0 (0): Enable the FlexCAN module.

1 (1): Disable the FlexCAN module.

Links

() ()